Following the SPIR-V Standard, the ContractionOff execution mode of the instruction OpExecutionMode is defined as follows:

Indicates that floating-point-expressions contraction is disallowed. Only valid with the Kernel Execution Model.

Does this mean FMA instructions are enabled? What is exactly disallowed? Could someone clarify it, please?

Kind regards,

Presumably it works like the shader-only NoContraction decoration, except applying to the entire kernel.

Under NoContraction, the SPIR-V specification explicitly mentions that it would disallow a multiply followed by an add from becoming an FMA. So presumably, if ContractionOff is specified in a kernel, then it would do that globally.

To me, what it seems to be saying is “do the math exactly the way I said.”

So, if I want to enable FMA, this instruction should not be in the SPIR-V code. Is that correct?

OpExecutionMode %oclKernelEntry ContractionOff

“Contraction” means (among other things) that the compiler can turn multiplication followed by addition into FMAs. If you turn off contraction, then you won’t get any such compiler optimizations. So no compiler-generated FMAs for you, though you can still write your own with OpenCL extended opcodes.

Got it. Thank you @Alfonse_Reinheart .